-------------------------------------
-- added to make compile of below possible
-------------------------------------
entity test is
  port (x : in bit);
  subtype int_type is integer;
end test;
-------------------------------------
ARCHITECTURE test OF test IS
BEGIN
  PROCESS(X)
    VARIABLE a : INTEGER;
    VARIABLE b : int_type;
  BEGIN
    a := 1;    -- Ok    1
    a := -1;   -- Ok    2
--    a := 1.0;  -- error 3 
  END PROCESS;
END test;




ARCHITECTURE test OF test IS
  SIGNAL a : REAL;
BEGIN
--  a <= 1.0;       -- Ok  1
--  a <= 1;         -- error 2
--  a <= -1.0E10;   -- Ok    3
  a <= 1.5E-20;   -- Ok    4
--  a <= 5.3 ns;    -- error 5
END test;

